Added support for Wb32fq95 (#16871)
Joy Lee
3 years ago
committed by
GitHub
parent
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commit
1c7e8b9a9d
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/*
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Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd |
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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You may obtain a copy of the License at |
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software |
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distributed under the License is distributed on an "AS IS" BASIS, |
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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See the License for the specific language governing permissions and |
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limitations under the License. |
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*/ |
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/*
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* This file has been automatically generated using ChibiStudio board |
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* generator plugin. Do not edit manually. |
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*/ |
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#include "hal.h" |
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/*===========================================================================*/ |
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/* Driver local definitions. */ |
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/*===========================================================================*/ |
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/*===========================================================================*/ |
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/* Driver exported variables. */ |
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/*===========================================================================*/ |
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/*===========================================================================*/ |
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/* Driver local variables and types. */ |
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/*===========================================================================*/ |
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/*===========================================================================*/ |
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/* Driver local functions. */ |
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/*===========================================================================*/ |
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static void wb32_gpio_init(void) { |
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#if WB32_HAS_GPIOA |
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rccEnableAPB1(RCC_APB1ENR_GPIOAEN); |
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#endif |
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#if WB32_HAS_GPIOB |
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rccEnableAPB1(RCC_APB1ENR_GPIOBEN); |
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#endif |
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#if WB32_HAS_GPIOC |
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rccEnableAPB1(RCC_APB1ENR_GPIOCEN); |
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#endif |
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#if WB32_HAS_GPIOD |
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rccEnableAPB1(RCC_APB1ENR_GPIODEN); |
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#endif |
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} |
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/*===========================================================================*/ |
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/* Driver interrupt handlers. */ |
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/*===========================================================================*/ |
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/*===========================================================================*/ |
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/* Driver exported functions. */ |
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/*===========================================================================*/ |
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/*
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* Early initialization code. |
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* This initialization must be performed just after stack setup and before |
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* any other initialization. |
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*/ |
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void __early_init(void) { |
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wb32_clock_init(); |
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wb32_gpio_init(); |
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} |
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/**
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* @brief Board-specific initialization code. |
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* @note You can add your board-specific code here. |
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*/ |
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void boardInit(void) { |
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} |
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@ -0,0 +1,59 @@ |
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#pragma once |
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/*
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Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd |
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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You may obtain a copy of the License at |
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software |
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distributed under the License is distributed on an "AS IS" BASIS, |
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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See the License for the specific language governing permissions and |
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limitations under the License. |
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*/ |
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/*
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* This file has been automatically generated using ChibiStudio board |
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* generator plugin. Do not edit manually. |
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*/ |
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#ifndef BOARD_H |
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#define BOARD_H |
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/*===========================================================================*/ |
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/* Driver constants. */ |
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/*===========================================================================*/ |
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/*
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* Setup board. |
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*/ |
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/*
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* Board identifier. |
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*/ |
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#if !(defined(WB32FQ95x9) || defined(WB32FQ95xB) || defined(WB32FQ95xC)) |
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#define WB32FQ95xB |
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#endif |
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#if !defined(WB32FQ95xx) |
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#define WB32FQ95xx |
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#endif |
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/*===========================================================================*/ |
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/* External declarations. */ |
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/*===========================================================================*/ |
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#if !defined(_FROM_ASM_) |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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void boardInit(void); |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* _FROM_ASM_ */ |
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#endif /* BOARD_H */ |
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@ -0,0 +1,9 @@ |
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# List of all the board related files.
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BOARDSRC = $(BOARD_PATH)/board/board.c
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# Required include directories
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BOARDINC = $(BOARD_PATH)/board
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# Shared variables
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ALLCSRC += $(BOARDSRC)
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ALLINC += $(BOARDINC)
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@ -0,0 +1,26 @@ |
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/* Copyright 2020 QMK
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* |
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* This program is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation, either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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/*
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* This file was auto-generated by: |
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* `qmk chibios-confmigrate -i platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/chconf.h -r platforms/chibios/boards/common/configs/chconf.h` |
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*/ |
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#pragma once |
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#define CH_CFG_ST_TIMEDELTA 0 |
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#include_next <chconf.h> |
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@ -0,0 +1,20 @@ |
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/* Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
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* |
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* This program is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/ |
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#pragma once |
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#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP |
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# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE |
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#endif |
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@ -0,0 +1,168 @@ |
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/*
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Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd |
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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You may obtain a copy of the License at |
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software |
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distributed under the License is distributed on an "AS IS" BASIS, |
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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See the License for the specific language governing permissions and |
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limitations under the License. |
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*/ |
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#ifndef MCUCONF_H |
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#define MCUCONF_H |
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#define WB32FQ95xx_MCUCONF TRUE |
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/*
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* WB32FQ95 drivers configuration. |
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* The following settings override the default settings present in |
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* the various device driver implementation headers. |
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* Note that the settings for each driver only have effect if the whole |
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* driver is enabled in halconf.h. |
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* |
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* IRQ priorities: |
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* 15...0 Lowest...Highest. |
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* |
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*/ |
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/**
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* @name Internal clock sources |
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* @{ |
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*/ |
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#define WB32_HSECLK 12000000 |
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#define WB32_LSECLK 32768 |
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/*
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* HAL driver system settings. |
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*/ |
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#define WB32_NO_INIT FALSE |
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#define WB32_MHSI_ENABLED TRUE |
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#define WB32_FHSI_ENABLED FALSE |
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#define WB32_LSI_ENABLED FALSE |
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#define WB32_HSE_ENABLED TRUE |
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#define WB32_LSE_ENABLED FALSE |
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#define WB32_PLL_ENABLED TRUE |
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#define WB32_MAINCLKSRC WB32_MAINCLKSRC_PLL |
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#define WB32_PLLSRC WB32_PLLSRC_HSE |
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#define WB32_PLLDIV_VALUE 2 |
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#define WB32_PLLMUL_VALUE 12 //The allowed range is 12,16,20,24.
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#define WB32_HPRE 1 |
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#define WB32_PPRE1 1 |
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#define WB32_PPRE2 1 |
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#define WB32_USBPRE WB32_USBPRE_DIV1P5 |
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/*
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* EXTI driver system settings. |
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*/ |
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#define WB32_IRQ_EXTI0_PRIORITY 6 |
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#define WB32_IRQ_EXTI1_PRIORITY 6 |
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#define WB32_IRQ_EXTI2_PRIORITY 6 |
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#define WB32_IRQ_EXTI3_PRIORITY 6 |
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#define WB32_IRQ_EXTI4_PRIORITY 6 |
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#define WB32_IRQ_EXTI5_9_PRIORITY 6 |
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#define WB32_IRQ_EXTI10_15_PRIORITY 6 |
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#define WB32_IRQ_EXTI16_PRIORITY 6 |
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#define WB32_IRQ_EXTI17_PRIORITY 6 |
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#define WB32_IRQ_EXTI18_PRIORITY 6 |
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#define WB32_IRQ_EXTI19_PRIORITY 6 |
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/*
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* GPT driver system settings. |
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*/ |
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#define WB32_TIM_MAX_CHANNELS 4 |
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#define WB32_GPT_USE_TIM1 FALSE |
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#define WB32_GPT_USE_TIM2 FALSE |
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#define WB32_GPT_USE_TIM3 FALSE |
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#define WB32_GPT_USE_TIM4 FALSE |
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#define WB32_GPT_TIM1_IRQ_PRIORITY 7 |
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#define WB32_GPT_TIM2_IRQ_PRIORITY 7 |
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#define WB32_GPT_TIM3_IRQ_PRIORITY 7 |
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#define WB32_GPT_TIM4_IRQ_PRIORITY 7 |
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/*
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* ICU driver system settings. |
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*/ |
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#define WB32_ICU_USE_TIM1 FALSE |
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#define WB32_ICU_USE_TIM2 FALSE |
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#define WB32_ICU_USE_TIM3 FALSE |
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#define WB32_ICU_USE_TIM4 FALSE |
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#define WB32_ICU_TIM1_IRQ_PRIORITY 7 |
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#define WB32_ICU_TIM2_IRQ_PRIORITY 7 |
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#define WB32_ICU_TIM3_IRQ_PRIORITY 7 |
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#define WB32_ICU_TIM4_IRQ_PRIORITY 7 |
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/*
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* PWM driver system settings. |
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*/ |
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#define WB32_PWM_USE_ADVANCED FALSE |
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#define WB32_PWM_USE_TIM1 FALSE |
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#define WB32_PWM_USE_TIM2 FALSE |
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#define WB32_PWM_USE_TIM3 FALSE |
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#define WB32_PWM_USE_TIM4 FALSE |
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#define WB32_PWM_TIM1_IRQ_PRIORITY 7 |
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#define WB32_PWM_TIM2_IRQ_PRIORITY 7 |
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#define WB32_PWM_TIM3_IRQ_PRIORITY 7 |
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#define WB32_PWM_TIM4_IRQ_PRIORITY 7 |
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/*
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* I2C driver system settings. |
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*/ |
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#define WB32_I2C_USE_I2C1 FALSE |
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#define WB32_I2C_USE_I2C2 FALSE |
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#define WB32_I2C_BUSY_TIMEOUT 50 |
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#define WB32_I2C_I2C1_IRQ_PRIORITY 5 |
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#define WB32_I2C_I2C2_IRQ_PRIORITY 5 |
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/*
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* SERIAL driver system settings. |
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*/ |
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#define WB32_SERIAL_USE_UART1 FALSE |
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#define WB32_SERIAL_USE_UART2 FALSE |
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#define WB32_SERIAL_USE_UART3 FALSE |
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#define WB32_SERIAL_USART1_PRIORITY 12 |
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#define WB32_SERIAL_USART2_PRIORITY 12 |
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#define WB32_SERIAL_USART3_PRIORITY 12 |
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/*
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* SPI driver system settings. |
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*/ |
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#define WB32_SPI_USE_QSPI FALSE |
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#define WB32_SPI_USE_SPIM2 FALSE |
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#define WB32_SPI_USE_SPIS1 FALSE |
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#define WB32_SPI_USE_SPIS2 FALSE |
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#define WB32_SPI_QSPI_IRQ_PRIORITY 10 |
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#define WB32_SPI_SPIM2_IRQ_PRIORITY 10 |
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#define WB32_SPI_SPIS1_IRQ_PRIORITY 10 |
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#define WB32_SPI_SPIS2_IRQ_PRIORITY 10 |
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/*
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* ST driver system settings. |
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*/ |
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#define WB32_ST_IRQ_PRIORITY 8 |
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#define WB32_ST_USE_TIMER 2 |
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/*
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* UART driver system settings. |
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*/ |
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#define WB32_UART_USE_UART1 FALSE |
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#define WB32_UART_USE_UART2 FALSE |
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#define WB32_UART_USE_UART3 FALSE |
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#define WB32_UART_UART1_IRQ_PRIORITY 12 |
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#define WB32_UART_UART2_IRQ_PRIORITY 12 |
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#define WB32_UART_UART3_IRQ_PRIORITY 12 |
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/*
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* USB driver system settings. |
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*/ |
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#define WB32_USB_USE_USB1 TRUE |
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#define WB32_USB_USB1_IRQ_PRIORITY 13 |
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#define WB32_USB_HOST_WAKEUP_DURATION 10 |
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#endif /* MCUCONF_H */ |
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