Add suggested fixes from PR.gc_switch
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio |
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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You may obtain a copy of the License at |
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software |
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distributed under the License is distributed on an "AS IS" BASIS, |
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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See the License for the specific language governing permissions and |
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limitations under the License. |
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*/ |
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/**
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* @file templates/halconf.h |
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* @brief HAL configuration header. |
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* @details HAL configuration file, this file allows to enable or disable the |
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* various device drivers from your application. You may also use |
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* this file in order to override the device drivers default settings. |
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* |
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* @addtogroup HAL_CONF |
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* @{ |
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*/ |
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#ifndef HALCONF_H |
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# define HALCONF_H |
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# define _CHIBIOS_HAL_CONF_ |
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# define _CHIBIOS_HAL_CONF_VER_7_0_ |
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# include "mcuconf.h" |
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/**
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* @brief Enables the PAL subsystem. |
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*/ |
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# if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) |
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# define HAL_USE_PAL TRUE |
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# endif |
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/**
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* @brief Enables the ADC subsystem. |
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*/ |
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# if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) |
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# define HAL_USE_ADC TRUE |
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# endif |
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/**
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* @brief Enables the CAN subsystem. |
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*/ |
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# if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) |
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# define HAL_USE_CAN FALSE |
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# endif |
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/**
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* @brief Enables the cryptographic subsystem. |
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*/ |
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# if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) |
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# define HAL_USE_CRY FALSE |
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# endif |
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/**
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* @brief Enables the DAC subsystem. |
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*/ |
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# if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) |
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# define HAL_USE_DAC TRUE |
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# endif |
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/**
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* @brief Enables the GPT subsystem. |
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*/ |
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# if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) |
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# define HAL_USE_GPT TRUE |
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# endif |
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/**
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* @brief Enables the I2C subsystem. |
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*/ |
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# if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) |
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# define HAL_USE_I2C TRUE |
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# endif |
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/**
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* @brief Enables the I2S subsystem. |
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*/ |
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# if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) |
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# define HAL_USE_I2S FALSE |
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# endif |
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/**
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* @brief Enables the ICU subsystem. |
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*/ |
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# if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) |
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# define HAL_USE_ICU FALSE |
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# endif |
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/**
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* @brief Enables the MAC subsystem. |
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*/ |
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# if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) |
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# define HAL_USE_MAC FALSE |
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# endif |
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/**
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* @brief Enables the MMC_SPI subsystem. |
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*/ |
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# if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) |
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# define HAL_USE_MMC_SPI FALSE |
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# endif |
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/**
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* @brief Enables the PWM subsystem. |
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*/ |
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# if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) |
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# define HAL_USE_PWM TRUE |
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# endif |
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/**
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* @brief Enables the RTC subsystem. |
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*/ |
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# if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) |
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# define HAL_USE_RTC FALSE |
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# endif |
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/**
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* @brief Enables the SDC subsystem. |
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*/ |
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# if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) |
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# define HAL_USE_SDC FALSE |
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# endif |
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/**
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* @brief Enables the SERIAL subsystem. |
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*/ |
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# if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) |
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# define HAL_USE_SERIAL FALSE |
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# endif |
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/**
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* @brief Enables the SERIAL over USB subsystem. |
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*/ |
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# if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) |
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# define HAL_USE_SERIAL_USB TRUE |
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# endif |
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/**
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* @brief Enables the SIO subsystem. |
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*/ |
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# if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) |
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# define HAL_USE_SIO FALSE |
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# endif |
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/**
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* @brief Enables the SPI subsystem. |
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*/ |
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# if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) |
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# define HAL_USE_SPI FALSE |
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# endif |
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/**
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* @brief Enables the TRNG subsystem. |
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*/ |
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# if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) |
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# define HAL_USE_TRNG FALSE |
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# endif |
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/**
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* @brief Enables the UART subsystem. |
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*/ |
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# if !defined(HAL_USE_UART) || defined(__DOXYGEN__) |
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# define HAL_USE_UART FALSE |
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# endif |
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/**
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* @brief Enables the USB subsystem. |
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*/ |
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# if !defined(HAL_USE_USB) || defined(__DOXYGEN__) |
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# define HAL_USE_USB TRUE |
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# endif |
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/**
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* @brief Enables the WDG subsystem. |
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*/ |
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# if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) |
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# define HAL_USE_WDG FALSE |
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# endif |
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/**
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* @brief Enables the WSPI subsystem. |
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*/ |
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# if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) |
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# define HAL_USE_WSPI FALSE |
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# endif |
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/*===========================================================================*/ |
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/* PAL driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Enables synchronous APIs. |
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* @note Disabling this option saves both code and data space. |
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*/ |
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# if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) |
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# define PAL_USE_CALLBACKS FALSE |
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# endif |
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/**
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* @brief Enables synchronous APIs. |
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* @note Disabling this option saves both code and data space. |
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*/ |
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# if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) |
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# define PAL_USE_WAIT FALSE |
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# endif |
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/*===========================================================================*/ |
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/* ADC driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Enables synchronous APIs. |
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* @note Disabling this option saves both code and data space. |
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*/ |
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# if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) |
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# define ADC_USE_WAIT TRUE |
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# endif |
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/**
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* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. |
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* @note Disabling this option saves both code and data space. |
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*/ |
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# if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
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# define ADC_USE_MUTUAL_EXCLUSION TRUE |
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# endif |
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/*===========================================================================*/ |
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/* CAN driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Sleep mode related APIs inclusion switch. |
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*/ |
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# if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) |
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# define CAN_USE_SLEEP_MODE TRUE |
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# endif |
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/**
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* @brief Enforces the driver to use direct callbacks rather than OSAL events. |
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*/ |
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# if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) |
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# define CAN_ENFORCE_USE_CALLBACKS FALSE |
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# endif |
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/*===========================================================================*/ |
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/* CRY driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Enables the SW fall-back of the cryptographic driver. |
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* @details When enabled, this option, activates a fall-back software |
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* implementation for algorithms not supported by the underlying |
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* hardware. |
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* @note Fall-back implementations may not be present for all algorithms. |
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*/ |
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# if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) |
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# define HAL_CRY_USE_FALLBACK FALSE |
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# endif |
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/**
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* @brief Makes the driver forcibly use the fall-back implementations. |
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*/ |
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# if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) |
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# define HAL_CRY_ENFORCE_FALLBACK FALSE |
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# endif |
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/*===========================================================================*/ |
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/* DAC driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Enables synchronous APIs. |
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* @note Disabling this option saves both code and data space. |
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*/ |
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# if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) |
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# define DAC_USE_WAIT TRUE |
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# endif |
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/**
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* @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. |
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* @note Disabling this option saves both code and data space. |
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*/ |
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# if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
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# define DAC_USE_MUTUAL_EXCLUSION TRUE |
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# endif |
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/*===========================================================================*/ |
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/* I2C driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Enables the mutual exclusion APIs on the I2C bus. |
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*/ |
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# if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
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# define I2C_USE_MUTUAL_EXCLUSION TRUE |
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# endif |
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/*===========================================================================*/ |
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/* MAC driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Enables the zero-copy API. |
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*/ |
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# if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) |
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# define MAC_USE_ZERO_COPY FALSE |
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# endif |
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/**
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* @brief Enables an event sources for incoming packets. |
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*/ |
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# if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) |
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# define MAC_USE_EVENTS TRUE |
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# endif |
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/*===========================================================================*/ |
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/* MMC_SPI driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Delays insertions. |
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* @details If enabled this options inserts delays into the MMC waiting |
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* routines releasing some extra CPU time for the threads with |
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* lower priority, this may slow down the driver a bit however. |
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* This option is recommended also if the SPI driver does not |
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* use a DMA channel and heavily loads the CPU. |
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*/ |
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# if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) |
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# define MMC_NICE_WAITING TRUE |
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# endif |
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/*===========================================================================*/ |
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/* SDC driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Number of initialization attempts before rejecting the card. |
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* @note Attempts are performed at 10mS intervals. |
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*/ |
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# if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) |
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# define SDC_INIT_RETRY 100 |
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# endif |
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/**
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* @brief Include support for MMC cards. |
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* @note MMC support is not yet implemented so this option must be kept |
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* at @p FALSE. |
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*/ |
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# if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) |
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# define SDC_MMC_SUPPORT FALSE |
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# endif |
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/**
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* @brief Delays insertions. |
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* @details If enabled this options inserts delays into the MMC waiting |
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* routines releasing some extra CPU time for the threads with |
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* lower priority, this may slow down the driver a bit however. |
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*/ |
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# if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) |
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# define SDC_NICE_WAITING TRUE |
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# endif |
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/**
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* @brief OCR initialization constant for V20 cards. |
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*/ |
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# if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) |
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# define SDC_INIT_OCR_V20 0x50FF8000U |
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# endif |
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/**
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* @brief OCR initialization constant for non-V20 cards. |
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*/ |
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# if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) |
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# define SDC_INIT_OCR 0x80100000U |
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# endif |
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/*===========================================================================*/ |
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/* SERIAL driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Default bit rate. |
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* @details Configuration parameter, this is the baud rate selected for the |
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* default configuration. |
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*/ |
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# if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) |
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# define SERIAL_DEFAULT_BITRATE 38400 |
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# endif |
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/**
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* @brief Serial buffers size. |
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* @details Configuration parameter, you can change the depth of the queue |
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* buffers depending on the requirements of your application. |
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* @note The default is 16 bytes for both the transmission and receive |
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* buffers. |
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*/ |
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# if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) |
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# define SERIAL_BUFFERS_SIZE 16 |
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# endif |
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/*===========================================================================*/ |
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/* SERIAL_USB driver related setting. */ |
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/*===========================================================================*/ |
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/**
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* @brief Serial over USB buffers size. |
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* @details Configuration parameter, the buffer size must be a multiple of |
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* the USB data endpoint maximum packet size. |
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* @note The default is 256 bytes for both the transmission and receive |
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* buffers. |
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*/ |
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# if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) |
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# define SERIAL_USB_BUFFERS_SIZE 1 |
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# endif |
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/**
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* @brief Serial over USB number of buffers. |
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* @note The default is 2 buffers. |
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*/ |
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# if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) |
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# define SERIAL_USB_BUFFERS_NUMBER 2 |
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# endif |
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/*===========================================================================*/ |
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/* SPI driver related settings. */ |
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/*===========================================================================*/ |
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/**
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* @brief Enables synchronous APIs. |
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* @note Disabling this option saves both code and data space. |
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*/ |
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# if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) |
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# define SPI_USE_WAIT TRUE |
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# endif |
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/**
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* @brief Enables circular transfers APIs. |
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* @note Disabling this option saves both code and data space. |
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*/ |
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# if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) |
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# define SPI_USE_CIRCULAR FALSE |
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# endif |
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/**
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|
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. |
||||||
|
* @note Disabling this option saves both code and data space. |
||||||
|
*/ |
||||||
|
# if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
||||||
|
# define SPI_USE_MUTUAL_EXCLUSION TRUE |
||||||
|
# endif |
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Handling method for SPI CS line. |
||||||
|
* @note Disabling this option saves both code and data space. |
||||||
|
*/ |
||||||
|
# if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) |
||||||
|
# define SPI_SELECT_MODE SPI_SELECT_MODE_PAD |
||||||
|
# endif |
||||||
|
|
||||||
|
/*===========================================================================*/ |
||||||
|
/* UART driver related settings. */ |
||||||
|
/*===========================================================================*/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs. |
||||||
|
* @note Disabling this option saves both code and data space. |
||||||
|
*/ |
||||||
|
# if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) |
||||||
|
# define UART_USE_WAIT FALSE |
||||||
|
# endif |
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. |
||||||
|
* @note Disabling this option saves both code and data space. |
||||||
|
*/ |
||||||
|
# if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
||||||
|
# define UART_USE_MUTUAL_EXCLUSION FALSE |
||||||
|
# endif |
||||||
|
|
||||||
|
/*===========================================================================*/ |
||||||
|
/* USB driver related settings. */ |
||||||
|
/*===========================================================================*/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs. |
||||||
|
* @note Disabling this option saves both code and data space. |
||||||
|
*/ |
||||||
|
# if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) |
||||||
|
# define USB_USE_WAIT TRUE |
||||||
|
# endif |
||||||
|
|
||||||
|
/*===========================================================================*/ |
||||||
|
/* WSPI driver related settings. */ |
||||||
|
/*===========================================================================*/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs. |
||||||
|
* @note Disabling this option saves both code and data space. |
||||||
|
*/ |
||||||
|
# if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) |
||||||
|
# define WSPI_USE_WAIT TRUE |
||||||
|
# endif |
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. |
||||||
|
* @note Disabling this option saves both code and data space. |
||||||
|
*/ |
||||||
|
# if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
||||||
|
# define WSPI_USE_MUTUAL_EXCLUSION TRUE |
||||||
|
# endif |
||||||
|
|
||||||
|
#endif /* HALCONF_H */ |
||||||
|
|
||||||
|
/** @} */ |
@ -0,0 +1,273 @@ |
|||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio |
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License"); |
||||||
|
you may not use this file except in compliance with the License. |
||||||
|
You may obtain a copy of the License at |
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software |
||||||
|
distributed under the License is distributed on an "AS IS" BASIS, |
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
||||||
|
See the License for the specific language governing permissions and |
||||||
|
limitations under the License. |
||||||
|
*/ |
||||||
|
|
||||||
|
#ifndef MCUCONF_H |
||||||
|
#define MCUCONF_H |
||||||
|
|
||||||
|
/*
|
||||||
|
* STM32F3xx drivers configuration. |
||||||
|
* The following settings override the default settings present in |
||||||
|
* the various device driver implementation headers. |
||||||
|
* Note that the settings for each driver only have effect if the whole |
||||||
|
* driver is enabled in halconf.h. |
||||||
|
* |
||||||
|
* IRQ priorities: |
||||||
|
* 15...0 Lowest...Highest. |
||||||
|
* |
||||||
|
* DMA priorities: |
||||||
|
* 0...3 Lowest...Highest. |
||||||
|
*/ |
||||||
|
|
||||||
|
#define STM32F3xx_MCUCONF |
||||||
|
#define STM32F303_MCUCONF |
||||||
|
|
||||||
|
/*
|
||||||
|
* HAL driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_NO_INIT FALSE |
||||||
|
#define STM32_PVD_ENABLE FALSE |
||||||
|
#define STM32_PLS STM32_PLS_LEV0 |
||||||
|
#define STM32_HSI_ENABLED TRUE |
||||||
|
#define STM32_LSI_ENABLED TRUE |
||||||
|
#define STM32_HSE_ENABLED TRUE |
||||||
|
#define STM32_LSE_ENABLED FALSE |
||||||
|
#define STM32_SW STM32_SW_PLL |
||||||
|
#define STM32_PLLSRC STM32_PLLSRC_HSE |
||||||
|
#define STM32_PREDIV_VALUE 1 |
||||||
|
#define STM32_PLLMUL_VALUE 9 |
||||||
|
#define STM32_HPRE STM32_HPRE_DIV1 |
||||||
|
#define STM32_PPRE1 STM32_PPRE1_DIV2 |
||||||
|
#define STM32_PPRE2 STM32_PPRE2_DIV2 |
||||||
|
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK |
||||||
|
#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 |
||||||
|
#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 |
||||||
|
#define STM32_USART1SW STM32_USART1SW_PCLK |
||||||
|
#define STM32_USART2SW STM32_USART2SW_PCLK |
||||||
|
#define STM32_USART3SW STM32_USART3SW_PCLK |
||||||
|
#define STM32_UART4SW STM32_UART4SW_PCLK |
||||||
|
#define STM32_UART5SW STM32_UART5SW_PCLK |
||||||
|
#define STM32_I2C1SW STM32_I2C1SW_SYSCLK |
||||||
|
#define STM32_I2C2SW STM32_I2C2SW_SYSCLK |
||||||
|
#define STM32_TIM1SW STM32_TIM1SW_PCLK2 |
||||||
|
#define STM32_TIM8SW STM32_TIM8SW_PCLK2 |
||||||
|
#define STM32_RTCSEL STM32_RTCSEL_LSI |
||||||
|
#define STM32_USB_CLOCK_REQUIRED TRUE |
||||||
|
#define STM32_USBPRE STM32_USBPRE_DIV1P5 |
||||||
|
|
||||||
|
/*
|
||||||
|
* IRQ system settings. |
||||||
|
*/ |
||||||
|
#define STM32_IRQ_EXTI0_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI1_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI2_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI3_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI4_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI5_9_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI10_15_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI16_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI17_PRIORITY 15 |
||||||
|
#define STM32_IRQ_EXTI18_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI19_PRIORITY 15 |
||||||
|
#define STM32_IRQ_EXTI20_PRIORITY 15 |
||||||
|
#define STM32_IRQ_EXTI21_22_29_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI30_32_PRIORITY 6 |
||||||
|
#define STM32_IRQ_EXTI33_PRIORITY 6 |
||||||
|
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 |
||||||
|
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 |
||||||
|
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 |
||||||
|
#define STM32_IRQ_TIM1_CC_PRIORITY 7 |
||||||
|
|
||||||
|
/*
|
||||||
|
* ADC driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_ADC_DUAL_MODE FALSE |
||||||
|
#define STM32_ADC_COMPACT_SAMPLES FALSE |
||||||
|
#define STM32_ADC_USE_ADC1 TRUE |
||||||
|
#define STM32_ADC_USE_ADC2 FALSE |
||||||
|
#define STM32_ADC_USE_ADC3 FALSE |
||||||
|
#define STM32_ADC_USE_ADC4 FALSE |
||||||
|
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) |
||||||
|
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) |
||||||
|
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) |
||||||
|
#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) |
||||||
|
#define STM32_ADC_ADC1_DMA_PRIORITY 2 |
||||||
|
#define STM32_ADC_ADC2_DMA_PRIORITY 2 |
||||||
|
#define STM32_ADC_ADC3_DMA_PRIORITY 2 |
||||||
|
#define STM32_ADC_ADC4_DMA_PRIORITY 2 |
||||||
|
#define STM32_ADC_ADC12_IRQ_PRIORITY 5 |
||||||
|
#define STM32_ADC_ADC3_IRQ_PRIORITY 5 |
||||||
|
#define STM32_ADC_ADC4_IRQ_PRIORITY 5 |
||||||
|
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 |
||||||
|
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 |
||||||
|
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 |
||||||
|
#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 |
||||||
|
#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 |
||||||
|
#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 |
||||||
|
|
||||||
|
/*
|
||||||
|
* CAN driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_CAN_USE_CAN1 FALSE |
||||||
|
#define STM32_CAN_CAN1_IRQ_PRIORITY 11 |
||||||
|
|
||||||
|
/*
|
||||||
|
* DAC driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_DAC_DUAL_MODE FALSE |
||||||
|
#define STM32_DAC_USE_DAC1_CH1 TRUE |
||||||
|
#define STM32_DAC_USE_DAC1_CH2 TRUE |
||||||
|
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 |
||||||
|
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 |
||||||
|
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 |
||||||
|
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 |
||||||
|
|
||||||
|
/*
|
||||||
|
* GPT driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_GPT_USE_TIM1 FALSE |
||||||
|
#define STM32_GPT_USE_TIM2 FALSE |
||||||
|
#define STM32_GPT_USE_TIM3 FALSE |
||||||
|
#define STM32_GPT_USE_TIM4 FALSE |
||||||
|
#define STM32_GPT_USE_TIM6 TRUE |
||||||
|
#define STM32_GPT_USE_TIM7 TRUE |
||||||
|
#define STM32_GPT_USE_TIM8 TRUE |
||||||
|
#define STM32_GPT_USE_TIM15 FALSE |
||||||
|
#define STM32_GPT_USE_TIM16 FALSE |
||||||
|
#define STM32_GPT_USE_TIM17 FALSE |
||||||
|
#define STM32_GPT_TIM1_IRQ_PRIORITY 7 |
||||||
|
#define STM32_GPT_TIM2_IRQ_PRIORITY 7 |
||||||
|
#define STM32_GPT_TIM3_IRQ_PRIORITY 7 |
||||||
|
#define STM32_GPT_TIM4_IRQ_PRIORITY 7 |
||||||
|
#define STM32_GPT_TIM6_IRQ_PRIORITY 7 |
||||||
|
#define STM32_GPT_TIM7_IRQ_PRIORITY 7 |
||||||
|
#define STM32_GPT_TIM8_IRQ_PRIORITY 7 |
||||||
|
|
||||||
|
/*
|
||||||
|
* I2C driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_I2C_USE_I2C1 TRUE |
||||||
|
#define STM32_I2C_USE_I2C2 FALSE |
||||||
|
#define STM32_I2C_BUSY_TIMEOUT 50 |
||||||
|
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 |
||||||
|
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 |
||||||
|
#define STM32_I2C_USE_DMA TRUE |
||||||
|
#define STM32_I2C_I2C1_DMA_PRIORITY 1 |
||||||
|
#define STM32_I2C_I2C2_DMA_PRIORITY 1 |
||||||
|
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") |
||||||
|
|
||||||
|
/*
|
||||||
|
* ICU driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_ICU_USE_TIM1 FALSE |
||||||
|
#define STM32_ICU_USE_TIM2 FALSE |
||||||
|
#define STM32_ICU_USE_TIM3 FALSE |
||||||
|
#define STM32_ICU_USE_TIM4 FALSE |
||||||
|
#define STM32_ICU_USE_TIM8 FALSE |
||||||
|
#define STM32_ICU_USE_TIM15 FALSE |
||||||
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7 |
||||||
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7 |
||||||
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7 |
||||||
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7 |
||||||
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7 |
||||||
|
|
||||||
|
/*
|
||||||
|
* PWM driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_PWM_USE_ADVANCED FALSE |
||||||
|
#define STM32_PWM_USE_TIM1 FALSE |
||||||
|
#define STM32_PWM_USE_TIM2 FALSE |
||||||
|
#define STM32_PWM_USE_TIM3 TRUE |
||||||
|
#define STM32_PWM_USE_TIM4 TRUE |
||||||
|
#define STM32_PWM_USE_TIM8 FALSE |
||||||
|
#define STM32_PWM_USE_TIM15 FALSE |
||||||
|
#define STM32_PWM_USE_TIM16 FALSE |
||||||
|
#define STM32_PWM_USE_TIM17 FALSE |
||||||
|
#define STM32_PWM_TIM1_IRQ_PRIORITY 7 |
||||||
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7 |
||||||
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7 |
||||||
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7 |
||||||
|
#define STM32_PWM_TIM8_IRQ_PRIORITY 7 |
||||||
|
|
||||||
|
/*
|
||||||
|
* RTC driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_RTC_PRESA_VALUE 32 |
||||||
|
#define STM32_RTC_PRESS_VALUE 1024 |
||||||
|
#define STM32_RTC_CR_INIT 0 |
||||||
|
#define STM32_RTC_TAMPCR_INIT 0 |
||||||
|
|
||||||
|
/*
|
||||||
|
* SERIAL driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_SERIAL_USE_USART1 FALSE |
||||||
|
#define STM32_SERIAL_USE_USART2 |
||||||
|
#define STM32_SERIAL_USE_USART3 FALSE |
||||||
|
#define STM32_SERIAL_USE_UART4 FALSE |
||||||
|
#define STM32_SERIAL_USE_UART5 FALSE |
||||||
|
#define STM32_SERIAL_USART1_PRIORITY 12 |
||||||
|
#define STM32_SERIAL_USART2_PRIORITY 12 |
||||||
|
#define STM32_SERIAL_USART3_PRIORITY 12 |
||||||
|
#define STM32_SERIAL_UART4_PRIORITY 12 |
||||||
|
#define STM32_SERIAL_UART5_PRIORITY 12 |
||||||
|
|
||||||
|
/*
|
||||||
|
* SPI driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_SPI_USE_SPI1 FALSE |
||||||
|
#define STM32_SPI_USE_SPI2 FALSE |
||||||
|
#define STM32_SPI_USE_SPI3 FALSE |
||||||
|
#define STM32_SPI_SPI1_DMA_PRIORITY 1 |
||||||
|
#define STM32_SPI_SPI2_DMA_PRIORITY 1 |
||||||
|
#define STM32_SPI_SPI3_DMA_PRIORITY 1 |
||||||
|
#define STM32_SPI_SPI1_IRQ_PRIORITY 10 |
||||||
|
#define STM32_SPI_SPI2_IRQ_PRIORITY 10 |
||||||
|
#define STM32_SPI_SPI3_IRQ_PRIORITY 10 |
||||||
|
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") |
||||||
|
|
||||||
|
/*
|
||||||
|
* ST driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_ST_IRQ_PRIORITY 8 |
||||||
|
#define STM32_ST_USE_TIMER 2 |
||||||
|
|
||||||
|
/*
|
||||||
|
* UART driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_UART_USE_USART1 FALSE |
||||||
|
#define STM32_UART_USE_USART2 FALSE |
||||||
|
#define STM32_UART_USE_USART3 FALSE |
||||||
|
#define STM32_UART_USART1_IRQ_PRIORITY 12 |
||||||
|
#define STM32_UART_USART2_IRQ_PRIORITY 12 |
||||||
|
#define STM32_UART_USART3_IRQ_PRIORITY 12 |
||||||
|
#define STM32_UART_USART1_DMA_PRIORITY 0 |
||||||
|
#define STM32_UART_USART2_DMA_PRIORITY 0 |
||||||
|
#define STM32_UART_USART3_DMA_PRIORITY 0 |
||||||
|
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") |
||||||
|
|
||||||
|
/*
|
||||||
|
* USB driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_USB_USE_USB1 TRUE |
||||||
|
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE |
||||||
|
#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 |
||||||
|
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 |
||||||
|
|
||||||
|
/*
|
||||||
|
* WDG driver system settings. |
||||||
|
*/ |
||||||
|
#define STM32_WDG_USE_IWDG FALSE |
||||||
|
|
||||||
|
#endif /* MCUCONF_H */ |
Loading…
Reference in new issue