RP2040 emulated EEPROM. (#17519)
Nick Brassel
3 years ago
committed by
GitHub
parent
9f1c4f304d
commit
5846b40f74
@ -0,0 +1,117 @@ |
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/* |
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ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio |
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|
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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You may obtain a copy of the License at |
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|
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http://www.apache.org/licenses/LICENSE-2.0 |
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|
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Unless required by applicable law or agreed to in writing, software |
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distributed under the License is distributed on an "AS IS" BASIS, |
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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See the License for the specific language governing permissions and |
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limitations under the License. |
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*/ |
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|
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/* |
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* RP2040 memory setup. |
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*/ |
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MEMORY |
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{ |
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flash0 (rx) : org = 0x00000000, len = 16k /* ROM */ |
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flash1 (rx) : org = 0x10000000, len = DEFINED(FLASH_LEN) ? FLASH_LEN : 2048k /* XIP */ |
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flash2 (rx) : org = 0x00000000, len = 0 |
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flash3 (rx) : org = 0x00000000, len = 0 |
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flash4 (rx) : org = 0x00000000, len = 0 |
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flash5 (rx) : org = 0x00000000, len = 0 |
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flash6 (rx) : org = 0x00000000, len = 0 |
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flash7 (rx) : org = 0x00000000, len = 0 |
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ram0 (wx) : org = 0x20000000, len = 256k /* SRAM0 striped */ |
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ram1 (wx) : org = 0x00000000, len = 256k /* SRAM0 non striped */ |
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ram2 (wx) : org = 0x00000000, len = 0 |
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ram3 (wx) : org = 0x00000000, len = 0 |
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ram4 (wx) : org = 0x20040000, len = 4k /* SRAM4 */ |
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ram5 (wx) : org = 0x20041000, len = 4k /* SRAM5 */ |
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ram6 (wx) : org = 0x00000000, len = 0 |
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ram7 (wx) : org = 0x20041f00, len = 256 /* SRAM5 boot */ |
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} |
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|
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/* For each data/text section two region are defined, a virtual region |
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and a load region (_LMA suffix).*/ |
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|
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/* Flash region to be used for exception vectors.*/ |
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REGION_ALIAS("VECTORS_FLASH", flash1); |
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REGION_ALIAS("VECTORS_FLASH_LMA", flash1); |
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|
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/* Flash region to be used for constructors and destructors.*/ |
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REGION_ALIAS("XTORS_FLASH", flash1); |
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REGION_ALIAS("XTORS_FLASH_LMA", flash1); |
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|
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/* Flash region to be used for code text.*/ |
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REGION_ALIAS("TEXT_FLASH", flash1); |
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REGION_ALIAS("TEXT_FLASH_LMA", flash1); |
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|
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/* Flash region to be used for read only data.*/ |
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REGION_ALIAS("RODATA_FLASH", flash1); |
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REGION_ALIAS("RODATA_FLASH_LMA", flash1); |
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|
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/* Flash region to be used for various.*/ |
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REGION_ALIAS("VARIOUS_FLASH", flash1); |
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REGION_ALIAS("VARIOUS_FLASH_LMA", flash1); |
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|
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/* Flash region to be used for RAM(n) initialization data.*/ |
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REGION_ALIAS("RAM_INIT_FLASH_LMA", flash1); |
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|
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/* RAM region to be used for Main stack. This stack accommodates the processing |
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of all exceptions and interrupts.*/ |
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REGION_ALIAS("MAIN_STACK_RAM", ram4); |
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|
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/* RAM region to be used for the process stack. This is the stack used by |
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the main() function.*/ |
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REGION_ALIAS("PROCESS_STACK_RAM", ram4); |
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|
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/* RAM region to be used for Main stack. This stack accommodates the processing |
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of all exceptions and interrupts.*/ |
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REGION_ALIAS("C1_MAIN_STACK_RAM", ram5); |
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|
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/* RAM region to be used for the process stack. This is the stack used by |
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the main() function.*/ |
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REGION_ALIAS("C1_PROCESS_STACK_RAM", ram5); |
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|
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/* RAM region to be used for data segment.*/ |
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REGION_ALIAS("DATA_RAM", ram0); |
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REGION_ALIAS("DATA_RAM_LMA", flash1); |
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|
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/* RAM region to be used for BSS segment.*/ |
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REGION_ALIAS("BSS_RAM", ram0); |
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|
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/* RAM region to be used for the default heap.*/ |
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REGION_ALIAS("HEAP_RAM", ram0); |
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SECTIONS |
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{ |
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.flash_begin : { |
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__flash_binary_start = .; |
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} > flash1 |
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|
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.boot2 : { |
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__boot2_start__ = .; |
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KEEP (*(.boot2)) |
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__boot2_end__ = .; |
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} > flash1 |
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} |
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|
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/* Generic rules inclusion.*/ |
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INCLUDE rules_stacks.ld |
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INCLUDE rules_stacks_c1.ld |
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INCLUDE RP2040_rules_code_with_boot2.ld |
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INCLUDE RP2040_rules_data_with_timecrit.ld |
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INCLUDE rules_memory.ld |
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|
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SECTIONS |
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{ |
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.flash_end : { |
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__flash_binary_end = .; |
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} > flash1 |
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} |
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@ -0,0 +1,46 @@ |
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/* |
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio |
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|
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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You may obtain a copy of the License at |
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|
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http://www.apache.org/licenses/LICENSE-2.0 |
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|
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Unless required by applicable law or agreed to in writing, software |
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distributed under the License is distributed on an "AS IS" BASIS, |
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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See the License for the specific language governing permissions and |
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limitations under the License. |
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*/ |
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|
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SECTIONS |
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{ |
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.data : ALIGN(4) |
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{ |
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PROVIDE(_textdata = LOADADDR(.data)); |
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PROVIDE(_data = .); |
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__textdata_base__ = LOADADDR(.data); |
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__data_base__ = .; |
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*(vtable) |
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*(.time_critical*) |
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. = ALIGN(4); |
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*(.data) |
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*(.data.*) |
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*(.ramtext) |
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. = ALIGN(4); |
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PROVIDE(_edata = .); |
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__data_end__ = .; |
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} > DATA_RAM AT > DATA_RAM_LMA |
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.bss (NOLOAD) : ALIGN(4) |
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{ |
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__bss_base__ = .; |
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*(.bss) |
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*(.bss.*) |
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*(COMMON) |
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. = ALIGN(4); |
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__bss_end__ = .; |
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PROVIDE(end = .); |
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} > BSS_RAM |
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} |
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@ -0,0 +1,221 @@ |
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/**
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd. |
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* Copyright (c) 2022 Nick Brassel (@tzarc) |
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* Copyright (c) 2022 Stefan Kerkmann (@KarlK90) |
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* |
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* SPDX-License-Identifier: BSD-3-Clause |
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*/ |
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#include "pico/bootrom.h" |
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#include "hardware/flash.h" |
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#include "hardware/sync.h" |
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#include "hardware/structs/ssi.h" |
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#include "hardware/structs/ioqspi.h" |
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#include <stdbool.h> |
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#include "timer.h" |
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#include "wear_leveling.h" |
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#include "wear_leveling_internal.h" |
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#ifndef WEAR_LEVELING_RP2040_FLASH_BULK_COUNT |
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# define WEAR_LEVELING_RP2040_FLASH_BULK_COUNT 64 |
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#endif // WEAR_LEVELING_RP2040_FLASH_BULK_COUNT
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#define FLASHCMD_PAGE_PROGRAM 0x02 |
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#define FLASHCMD_READ_STATUS 0x05 |
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#define FLASHCMD_WRITE_ENABLE 0x06 |
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extern uint8_t BOOT2_ROM[256]; |
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static uint32_t BOOT2_ROM_RAM[64]; |
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static ssi_hw_t *const ssi = (ssi_hw_t *)XIP_SSI_BASE; |
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// Sanity check
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check_hw_layout(ssi_hw_t, ssienr, SSI_SSIENR_OFFSET); |
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check_hw_layout(ssi_hw_t, spi_ctrlr0, SSI_SPI_CTRLR0_OFFSET); |
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static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) { |
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((void (*)(void))BOOT2_ROM_RAM + 1)(); |
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} |
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// Bitbanging the chip select using IO overrides, in case RAM-resident IRQs
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// are still running, and the FIFO bottoms out. (the bootrom does the same)
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static void __no_inline_not_in_flash_func(flash_cs_force)(bool high) { |
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uint32_t field_val = high ? IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_HIGH : IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_LOW; |
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hw_write_masked(&ioqspi_hw->io[1].ctrl, field_val << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB, IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS); |
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} |
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// Also allow any unbounded loops to check whether the above abort condition
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// was asserted, and terminate early
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static int __no_inline_not_in_flash_func(flash_was_aborted)(void) { |
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return *(io_rw_32 *)(IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SD1_CTRL_OFFSET) & IO_QSPI_GPIO_QSPI_SD1_CTRL_INOVER_BITS; |
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} |
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// Put bytes from one buffer, and get bytes into another buffer.
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// These can be the same buffer.
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// If tx is NULL then send zeroes.
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// If rx is NULL then all read data will be dropped.
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//
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// If rx_skip is nonzero, this many bytes will first be consumed from the FIFO,
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// before reading a further count bytes into *rx.
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// E.g. if you have written a command+address just before calling this function.
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static void __no_inline_not_in_flash_func(flash_put_get)(const uint8_t *tx, uint8_t *rx, size_t count, size_t rx_skip) { |
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// Make sure there is never more data in flight than the depth of the RX
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// FIFO. Otherwise, when we are interrupted for long periods, hardware
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// will overflow the RX FIFO.
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const uint max_in_flight = 16 - 2; // account for data internal to SSI
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size_t tx_count = count; |
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size_t rx_count = count; |
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while (tx_count || rx_skip || rx_count) { |
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// NB order of reads, for pessimism rather than optimism
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uint32_t tx_level = ssi_hw->txflr; |
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uint32_t rx_level = ssi_hw->rxflr; |
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bool did_something = false; // Expect this to be folded into control flow, not register
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if (tx_count && tx_level + rx_level < max_in_flight) { |
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ssi->dr0 = (uint32_t)(tx ? *tx++ : 0); |
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--tx_count; |
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did_something = true; |
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} |
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if (rx_level) { |
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uint8_t rxbyte = ssi->dr0; |
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did_something = true; |
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if (rx_skip) { |
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--rx_skip; |
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} else { |
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if (rx) *rx++ = rxbyte; |
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--rx_count; |
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} |
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} |
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// APB load costs 4 cycles, so only do it on idle loops (our budget is
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// 48 cyc/byte)
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if (!did_something && __builtin_expect(flash_was_aborted(), 0)) break; |
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} |
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flash_cs_force(1); |
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} |
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// Convenience wrapper for above
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// (And it's hard for the debug host to get the tight timing between
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// cmd DR0 write and the remaining data)
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static void __no_inline_not_in_flash_func(_flash_do_cmd)(uint8_t cmd, const uint8_t *tx, uint8_t *rx, size_t count) { |
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flash_cs_force(0); |
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ssi->dr0 = cmd; |
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flash_put_get(tx, rx, count, 1); |
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} |
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// Timing of this one is critical, so do not expose the symbol to debugger etc
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static void __no_inline_not_in_flash_func(flash_put_cmd_addr)(uint8_t cmd, uint32_t addr) { |
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flash_cs_force(0); |
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addr |= cmd << 24; |
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for (int i = 0; i < 4; ++i) { |
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ssi->dr0 = addr >> 24; |
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addr <<= 8; |
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} |
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} |
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// Poll the flash status register until the busy bit (LSB) clears
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static void __no_inline_not_in_flash_func(flash_wait_ready)(void) { |
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uint8_t stat; |
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do { |
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_flash_do_cmd(FLASHCMD_READ_STATUS, NULL, &stat, 1); |
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} while (stat & 0x1 && !flash_was_aborted()); |
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} |
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// Set the WEL bit (needed before any program/erase operation)
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static void __no_inline_not_in_flash_func(flash_enable_write)(void) { |
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_flash_do_cmd(FLASHCMD_WRITE_ENABLE, NULL, NULL, 0); |
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} |
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static void __no_inline_not_in_flash_func(pico_program_bulk)(uint32_t flash_address, backing_store_int_t *values, size_t item_count) { |
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rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH); |
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rom_flash_exit_xip_fn flash_exit_xip = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP); |
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rom_flash_flush_cache_fn flash_flush_cache = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE); |
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assert(connect_internal_flash && flash_exit_xip && flash_flush_cache); |
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static backing_store_int_t bulk_write_buffer[WEAR_LEVELING_RP2040_FLASH_BULK_COUNT]; |
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while (item_count) { |
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size_t batch_size = MIN(item_count, WEAR_LEVELING_RP2040_FLASH_BULK_COUNT); |
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for (size_t i = 0; i < batch_size; i++, values++, item_count--) { |
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bulk_write_buffer[i] = ~(*values); |
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} |
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__compiler_memory_barrier(); |
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connect_internal_flash(); |
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flash_exit_xip(); |
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flash_enable_write(); |
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flash_put_cmd_addr(FLASHCMD_PAGE_PROGRAM, flash_address); |
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flash_put_get((uint8_t *)bulk_write_buffer, NULL, batch_size * sizeof(backing_store_int_t), 4); |
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flash_wait_ready(); |
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flash_address += batch_size * sizeof(backing_store_int_t); |
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flash_flush_cache(); |
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flash_enable_xip_via_boot2(); |
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} |
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} |
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// QMK Wear-Leveling Backing Store implementation
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static int interrupts; |
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bool backing_store_init(void) { |
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bs_dprintf("Init\n"); |
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memcpy(BOOT2_ROM_RAM, BOOT2_ROM, sizeof(BOOT2_ROM)); |
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__compiler_memory_barrier(); |
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return true; |
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} |
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bool backing_store_unlock(void) { |
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bs_dprintf("Unlock\n"); |
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return true; |
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} |
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bool backing_store_erase(void) { |
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#ifdef WEAR_LEVELING_DEBUG_OUTPUT |
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uint32_t start = timer_read32(); |
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#endif |
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// Ensure the backing size can be cleanly subtracted from the flash size without alignment issues.
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_Static_assert((WEAR_LEVELING_BACKING_SIZE) % (FLASH_SECTOR_SIZE) == 0, "Backing size must be a multiple of FLASH_SECTOR_SIZE"); |
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interrupts = save_and_disable_interrupts(); |
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flash_range_erase((WEAR_LEVELING_RP2040_FLASH_BASE), (WEAR_LEVELING_BACKING_SIZE)); |
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restore_interrupts(interrupts); |
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bs_dprintf("Backing store erase took %ldms to complete\n", ((long)(timer_read32() - start))); |
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return true; |
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} |
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bool backing_store_write(uint32_t address, backing_store_int_t value) { |
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return backing_store_write_bulk(address, &value, 1); |
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} |
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bool backing_store_write_bulk(uint32_t address, backing_store_int_t *values, size_t item_count) { |
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uint32_t offset = (WEAR_LEVELING_RP2040_FLASH_BASE) + address; |
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bs_dprintf("Write "); |
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wl_dump(offset, values, sizeof(backing_store_int_t) * item_count); |
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interrupts = save_and_disable_interrupts(); |
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pico_program_bulk(offset, values, item_count); |
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restore_interrupts(interrupts); |
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return true; |
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} |
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bool backing_store_lock(void) { |
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return true; |
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} |
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bool backing_store_read(uint32_t address, backing_store_int_t *value) { |
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return backing_store_read_bulk(address, value, 1); |
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} |
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bool backing_store_read_bulk(uint32_t address, backing_store_int_t *values, size_t item_count) { |
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uint32_t offset = (WEAR_LEVELING_RP2040_FLASH_BASE) + address; |
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backing_store_int_t *loc = (backing_store_int_t *)((XIP_BASE) + offset); |
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for (size_t i = 0; i < item_count; ++i) { |
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values[i] = ~loc[i]; |
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} |
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bs_dprintf("Read "); |
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wl_dump(offset, values, item_count * sizeof(backing_store_int_t)); |
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return true; |
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} |
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@ -0,0 +1,32 @@ |
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// Copyright 2022 Nick Brassel (@tzarc)
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once |
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#ifndef __ASSEMBLER__ |
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# include "hardware/flash.h" |
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#endif |
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// 2-byte writes
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#ifndef BACKING_STORE_WRITE_SIZE |
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# define BACKING_STORE_WRITE_SIZE 2 |
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#endif |
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// 64kB backing space allocated
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#ifndef WEAR_LEVELING_BACKING_SIZE |
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# define WEAR_LEVELING_BACKING_SIZE 8192 |
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#endif // WEAR_LEVELING_BACKING_SIZE
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// 32kB logical EEPROM
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#ifndef WEAR_LEVELING_LOGICAL_SIZE |
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# define WEAR_LEVELING_LOGICAL_SIZE 4096 |
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#endif // WEAR_LEVELING_LOGICAL_SIZE
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// Define how much flash space we have (defaults to lib/pico-sdk/src/boards/include/boards/***)
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#ifndef WEAR_LEVELING_RP2040_FLASH_SIZE |
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# define WEAR_LEVELING_RP2040_FLASH_SIZE (PICO_FLASH_SIZE_BYTES) |
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#endif |
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// Define the location of emulated EEPROM
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#ifndef WEAR_LEVELING_RP2040_FLASH_BASE |
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# define WEAR_LEVELING_RP2040_FLASH_BASE ((WEAR_LEVELING_RP2040_FLASH_SIZE) - (WEAR_LEVELING_BACKING_SIZE)) |
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#endif |
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