parent
75da0d1877
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c6a7a028bd
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/*
|
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LUFA Library |
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Copyright (C) Dean Camera, 2011. |
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|
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dean [at] fourwalledcubicle [dot] com |
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www.lufa-lib.org |
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*/ |
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|
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/*
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Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) |
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|
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Permission to use, copy, modify, distribute, and sell this |
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software and its documentation for any purpose is hereby granted |
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without fee, provided that the above copyright notice appear in |
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all copies and that both that the copyright notice and this |
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permission notice and warranty disclaimer appear in supporting |
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documentation, and that the name of the author not be used in |
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advertising or publicity pertaining to distribution of the |
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software without specific, written prior permission. |
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|
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The author disclaim all warranties with regard to this |
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software, including all implied warranties of merchantability |
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and fitness. In no event shall the author be liable for any |
||||
special, indirect or consequential damages or any damages |
||||
whatsoever resulting from loss of use, data or profits, whether |
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in an action of contract, negligence or other tortious action, |
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arising out of or in connection with the use or performance of |
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this software. |
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*/ |
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#ifndef _CLOCK_MANAGEMENT_H_ |
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#define _CLOCK_MANAGEMENT_H_ |
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|
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/* Includes: */ |
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#include <avr32/io.h> |
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#include <stdbool.h> |
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#include <stdint.h> |
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#include <LUFA/Common/Common.h> |
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/* Macros: */ |
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enum Extern_OSC_ClockStartup_t |
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{ |
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EXOSC_START_0CLK = 0, |
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EXOSC_START_64CLK = 1, |
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EXOSC_START_128CLK = 2, |
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EXOSC_START_2048CLK = 3, |
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EXOSC_START_4096CLK = 4, |
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EXOSC_START_8192CLK = 5, |
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EXOSC_START_16384CLK = 6, |
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}; |
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enum Extern_OSC_ClockMode_t |
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{ |
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EXOSC_MODE_CLOCK = 0, |
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EXOSC_MODE_900KHZ_MAX = 1, |
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EXOSC_MODE_3MHZ_MAX = 2, |
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EXOSC_MODE_8MHZ_MAX = 3, |
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EXOSC_MODE_8MHZ_OR_MORE = 4,
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}; |
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enum |
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{ |
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CLOCK_SRC_SLOW_CLK = 0, |
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CLOCK_SRC_OSC0 = 1, |
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CLOCK_SRC_OSC1 = 2, |
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CLOCK_SRC_PLL0 = 3, |
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CLOCK_SRC_PLL1 = 4, |
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}; |
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/* Inline Functions: */ |
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static inline bool AVR32CLK_StartExternalOscillator(const uint8_t Channel, |
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const uint8_t Type, |
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const uint8_t Startup) |
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{ |
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AVR32_PM.OSCCTRL0.startup = Startup; |
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AVR32_PM.OSCCTRL0.mode = Type; |
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AVR32_PM.mcctrl |= (1 << (AVR32_PM_MCCTRL_OSC0EN_OFFSET + Channel)); |
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while (!(AVR32_PM.poscsr & (1 << (AVR32_PM_POSCSR_OSC0RDY_OFFSET + Channel)))); |
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return true; |
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} |
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static inline void AVR32CLK_StopExternalOscillator(const uint8_t Channel) |
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{ |
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AVR32_PM.mcctrl &= ~(1 << (AVR32_PM_MCCTRL_OSC0EN_OFFSET + Channel)); |
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} |
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static inline bool AVR32CLK_StartPLL(const uint8_t Channel, |
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const uint8_t Source, |
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const uint32_t SourceFreq, |
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const uint32_t Frequency) |
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{ |
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switch (Source) |
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{ |
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case CLOCK_SRC_OSC0: |
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AVR32_PM.PLL[Channel].pllosc = 0; |
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break; |
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case CLOCK_SRC_OSC1: |
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AVR32_PM.PLL[Channel].pllosc = 1; |
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break; |
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default: |
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return false; |
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} |
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AVR32_PM.PLL[Channel].pllmul = (Frequency / SourceFreq) ? (((Frequency / SourceFreq) - 1) / 2) : 0; |
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AVR32_PM.PLL[Channel].plldiv = 0; |
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AVR32_PM.PLL[Channel].pllen = true; |
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while (!(AVR32_PM.poscsr & (1 << (AVR32_PM_POSCSR_LOCK0_OFFSET + Channel)))); |
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return true; |
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} |
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static inline void AVR32CLK_StopPLL(const uint8_t Channel) |
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{ |
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AVR32_PM.PLL[Channel].pllen = false; |
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} |
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static inline bool AVR32CLK_StartGenericClock(const uint8_t Channel, |
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const uint8_t Source, |
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const uint32_t SourceFreq, |
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const uint32_t Frequency) |
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{ |
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switch (Source) |
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{ |
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case CLOCK_SRC_OSC0: |
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AVR32_PM.GCCTRL[Channel].pllsel = 0; |
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AVR32_PM.GCCTRL[Channel].oscsel = 0; |
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break; |
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case CLOCK_SRC_OSC1: |
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AVR32_PM.GCCTRL[Channel].pllsel = 0; |
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AVR32_PM.GCCTRL[Channel].oscsel = 1; |
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break; |
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case CLOCK_SRC_PLL0: |
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AVR32_PM.GCCTRL[Channel].pllsel = 1; |
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AVR32_PM.GCCTRL[Channel].oscsel = 0; |
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break; |
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case CLOCK_SRC_PLL1: |
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AVR32_PM.GCCTRL[Channel].pllsel = 1; |
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AVR32_PM.GCCTRL[Channel].oscsel = 1; |
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break; |
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default: |
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return false; |
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} |
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AVR32_PM.GCCTRL[Channel].diven = (SourceFreq > Frequency) ? true : false; |
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AVR32_PM.GCCTRL[Channel].div = (((SourceFreq / Frequency) - 1) / 2); |
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AVR32_PM.GCCTRL[Channel].cen = true; |
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return true; |
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} |
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static inline void AVR32CLK_StopGenericClock(const uint8_t Channel) |
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{ |
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AVR32_PM.GCCTRL[Channel].cen = false; |
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} |
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static inline bool AVR32CLK_SetCPUClockSource(const uint8_t Source, |
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const uint32_t SourceFreq) |
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{ |
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AVR32_FLASHC.FCR.fws = (SourceFreq > 30000000) ? true : false; |
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switch (Source) |
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{ |
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case CLOCK_SRC_SLOW_CLK: |
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AVR32_PM.MCCTRL.mcsel = 0; |
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break; |
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case CLOCK_SRC_OSC0: |
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AVR32_PM.MCCTRL.mcsel = 1; |
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break; |
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case CLOCK_SRC_PLL0: |
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AVR32_PM.MCCTRL.mcsel = 2; |
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break; |
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default: |
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return false; |
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} |
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return true; |
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} |
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#endif |
@ -0,0 +1,125 @@ |
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/* |
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LUFA Library |
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Copyright (C) Dean Camera, 2011. |
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|
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dean [at] fourwalledcubicle [dot] com |
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www.lufa-lib.org |
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*/ |
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|
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/* |
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Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) |
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|
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Permission to use, copy, modify, distribute, and sell this |
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software and its documentation for any purpose is hereby granted |
||||
without fee, provided that the above copyright notice appear in |
||||
all copies and that both that the copyright notice and this |
||||
permission notice and warranty disclaimer appear in supporting |
||||
documentation, and that the name of the author not be used in |
||||
advertising or publicity pertaining to distribution of the |
||||
software without specific, written prior permission. |
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|
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The author disclaim all warranties with regard to this |
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software, including all implied warranties of merchantability |
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and fitness. In no event shall the author be liable for any |
||||
special, indirect or consequential damages or any damages |
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whatsoever resulting from loss of use, data or profits, whether |
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in an action of contract, negligence or other tortious action, |
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arising out of or in connection with the use or performance of |
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this software. |
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*/ |
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#include <avr32/io.h> |
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.section .exception_handlers, "ax", @progbits
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// ================= EXCEPTION TABLE ================ |
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.balign 0x200
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.global EVBA_Table
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EVBA_Table: |
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.org 0x000
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Exception_Unrecoverable_Exception: |
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rjmp $ |
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.org 0x004
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Exception_TLB_Multiple_Hit: |
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rjmp $ |
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.org 0x008
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Exception_Bus_Error_Data_Fetch: |
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rjmp $ |
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.org 0x00C
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Exception_Bus_Error_Instruction_Fetch: |
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rjmp $ |
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.org 0x010
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Exception_NMI: |
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rjmp $ |
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.org 0x014
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Exception_Instruction_Address: |
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rjmp $ |
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.org 0x018
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Exception_ITLB_Protection: |
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rjmp $ |
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.org 0x01C
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Exception_OCD_Breakpoint: |
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rjmp $ |
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.org 0x020
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Exception_Illegal_Opcode: |
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rjmp $ |
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.org 0x024
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Exception_Unimplemented_Instruction: |
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rjmp $ |
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.org 0x028
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Exception_Privilege_Violation: |
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rjmp $ |
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.org 0x02C
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Exception_Floating_Point: |
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rjmp $ |
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.org 0x030
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Exception_Coprocessor_Absent: |
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rjmp $ |
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.org 0x034
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Exception_Data_Address_Read: |
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rjmp $ |
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.org 0x038
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Exception_Data_Address_Write: |
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rjmp $ |
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.org 0x03C
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Exception_DTLB_Protection_Read: |
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rjmp $ |
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.org 0x040
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Exception_DTLB_Protection_Write: |
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rjmp $ |
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.org 0x044
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Exception_DTLB_Modified: |
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rjmp $ |
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.org 0x050
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Exception_ITLB_Miss: |
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rjmp $ |
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.org 0x060
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Exception_DTLB_Miss_Read: |
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rjmp $ |
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.org 0x070
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Exception_DTLB_Miss_Write: |
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rjmp $ |
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.org 0x100
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Exception_Supervisor_Call: |
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rjmp $ |
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// ============== END OF EXCEPTION TABLE ============= |
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// ============= GENERAL INTERRUPT HANDLER =========== |
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.balign 4
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.irp Level, 0, 1, 2, 3 |
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Exception_INT\Level: |
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mov r12, \Level |
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call INTC_GetInterruptHandler |
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mov pc, r12 |
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.endr |
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// ========= END OF GENERAL INTERRUPT HANDLER ======== |
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// ====== GENERAL INTERRUPT HANDLER OFFSET TABLE ====== |
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.balign 4
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.global Autovector_Table
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Autovector_Table: |
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.irp Level, 0, 1, 2, 3 |
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.word ((AVR32_INTC_INT0 + \Level) << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (Exception_INT\Level - EVBA_Table) |
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.endr |
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// === END OF GENERAL INTERRUPT HANDLER OFFSET TABLE === |
@ -0,0 +1,62 @@ |
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/*
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LUFA Library |
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Copyright (C) Dean Camera, 2011. |
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|
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dean [at] fourwalledcubicle [dot] com |
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www.lufa-lib.org |
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*/ |
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|
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/*
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Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) |
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|
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Permission to use, copy, modify, distribute, and sell this |
||||
software and its documentation for any purpose is hereby granted |
||||
without fee, provided that the above copyright notice appear in |
||||
all copies and that both that the copyright notice and this |
||||
permission notice and warranty disclaimer appear in supporting |
||||
documentation, and that the name of the author not be used in |
||||
advertising or publicity pertaining to distribution of the |
||||
software without specific, written prior permission. |
||||
|
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The author disclaim all warranties with regard to this |
||||
software, including all implied warranties of merchantability |
||||
and fitness. In no event shall the author be liable for any |
||||
special, indirect or consequential damages or any damages |
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whatsoever resulting from loss of use, data or profits, whether |
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in an action of contract, negligence or other tortious action, |
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arising out of or in connection with the use or performance of |
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this software. |
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*/ |
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#include "InterruptManagement.h" |
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/** Interrupt vector table, containing the ISR to call for each interrupt group */ |
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InterruptHandlerPtr_t InterruptHandlers[AVR32_INTC_NUM_INT_GRPS]; |
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/** ISR for unhandled interrupt groups */ |
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ISR(Unhandled_Interrupt) |
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{ |
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while (true); |
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} |
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/** Retrieves the associated interrupt handler for the interrupt currently being fired. This is
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* called directly from the exception handler routine before dispatching to the ISR. |
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*/ |
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InterruptHandlerPtr_t INTC_GetInterruptHandler(const uint_reg_t InterruptLevel) |
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{ |
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return InterruptHandlers[AVR32_INTC.icr[AVR32_INTC_INT3 - InterruptLevel]]; |
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} |
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/** Initializes the interrupt controller ready to handle interrupts. This must be called at the
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* start of the user program before any interrupts are registered or enabled. |
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*/ |
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void INTC_Init(void) |
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{ |
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for (uint8_t InterruptGroup = 0; InterruptGroup < AVR32_INTC_NUM_INT_GRPS; InterruptGroup++) |
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{ |
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InterruptHandlers[InterruptGroup] = Unhandled_Interrupt; |
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AVR32_INTC.ipr[InterruptGroup] = Autovector_Table[AVR32_INTC_INT0]; |
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} |
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__builtin_mtsr(AVR32_EVBA, (uintptr_t)&EVBA_Table); |
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} |
@ -0,0 +1,83 @@ |
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/*
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LUFA Library |
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Copyright (C) Dean Camera, 2011. |
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|
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dean [at] fourwalledcubicle [dot] com |
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www.lufa-lib.org |
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*/ |
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|
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/*
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Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) |
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|
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Permission to use, copy, modify, distribute, and sell this |
||||
software and its documentation for any purpose is hereby granted |
||||
without fee, provided that the above copyright notice appear in |
||||
all copies and that both that the copyright notice and this |
||||
permission notice and warranty disclaimer appear in supporting |
||||
documentation, and that the name of the author not be used in |
||||
advertising or publicity pertaining to distribution of the |
||||
software without specific, written prior permission. |
||||
|
||||
The author disclaim all warranties with regard to this |
||||
software, including all implied warranties of merchantability |
||||
and fitness. In no event shall the author be liable for any |
||||
special, indirect or consequential damages or any damages |
||||
whatsoever resulting from loss of use, data or profits, whether |
||||
in an action of contract, negligence or other tortious action, |
||||
arising out of or in connection with the use or performance of |
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this software. |
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*/ |
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#ifndef _INTERRUPT_MANAGEMENT_H_ |
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#define _INTERRUPT_MANAGEMENT_H_ |
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/* Includes: */ |
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#include <avr32/io.h> |
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#include <stdbool.h> |
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#include <stdint.h> |
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#include <LUFA/Common/Common.h> |
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/* Macros: */ |
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#if !defined(ISR) |
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#define ISR(Name) void Name (void) __attribute__((__interrupt__)); void Name (void) |
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#endif |
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#define INTC_EnableInterrupts() do { GCC_MEMORY_BARRIER(); __builtin_csrf(AVR32_SR_GM_OFFSET); } while (0) |
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#define INTC_DisableInterrupts() do { __builtin_ssrf(AVR32_SR_GM_OFFSET); GCC_MEMORY_BARRIER(); } while (0) |
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/* Type Defines: */ |
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typedef void (*InterruptHandlerPtr_t)(void); |
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/* External Variables: */ |
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extern const void EVBA_Table; |
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extern const uint32_t Autovector_Table[]; |
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extern InterruptHandlerPtr_t InterruptHandlers[AVR32_INTC_NUM_INT_GRPS]; |
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/* Function Prototypes: */ |
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void INTC_Init(void); |
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/* Inline Functions: */ |
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/** Registers a handler for a given interrupt group. On the AVR32 UC3 devices, interrupts are grouped by
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* peripheral. To save on SRAM used, a single ISR handles all interrupt lines within a single group - to |
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* determine the exact line that has interrupted within the group ISR handler, examine the module's interrupt |
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* flag register bits. |
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* |
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* If multiple interrupts with the same group are registered, the last registered handler will become the |
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* handler called for interrupts raised within that group. |
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* |
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* \param[in] InterruptRequest Interrupt request index for the given interrupt, a AVR32_*_IRQ mask. |
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* \param[in] InterruptLevel Priority level for the specified interrupt, a AVR32_INTC_INT* mask. |
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* \param[in] Handler Address of the ISR handler for the interrupt group. |
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*/ |
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static inline void INTC_RegisterGroupHandler(const uint16_t InterruptRequest, |
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const uint8_t InterruptLevel, |
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const InterruptHandlerPtr_t Handler) |
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{ |
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uint8_t InterruptGroup = (InterruptRequest >> 5); |
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InterruptHandlers[InterruptGroup] = Handler; |
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AVR32_INTC.ipr[InterruptGroup] = Autovector_Table[InterruptLevel]; |
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} |
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#endif |
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Reference in new issue